AI Chip Demand: Nvidia, AMD, and the Accelerator Market

Introduction

AI has created the largest demand shock in semiconductor history, fundamentally reshaping the chip industry's revenue mix, competitive landscape, and investment requirements. Nvidia's data center revenue reached $51.2 billion in a single quarter (Q3 FY2026), a figure that would have represented a full year of revenue for the entire semiconductor industry just a decade ago. The AI accelerator market grew from $116 billion in 2024 and is projected to reach $604 billion by 2033, representing a compound annual growth rate of 16%. For TMT investment bankers, the AI chip demand cycle is driving the largest capital expenditure programs in technology history (Microsoft, Amazon, and Alphabet each committed $80-100 billion in 2025 capex, heavily weighted toward AI infrastructure), creating massive deal flow across the semiconductor value chain.

Nvidia controls approximately 92% of the discrete GPU market for AI workloads, a dominance that has made it one of the most valuable companies in the world (market capitalization exceeding $3 trillion at its peak). Understanding how Nvidia built this position and whether it is sustainable is essential for TMT analysts covering semiconductors.

GPU (Graphics Processing Unit) for AI

Originally designed for rendering graphics, GPUs became the dominant hardware platform for AI because their massively parallel architecture (thousands of cores processing data simultaneously) is ideally suited to the matrix multiplication operations that underpin neural network training and inference. Nvidia's CUDA software platform, developed over 15+ years, provides the programming tools that AI researchers and engineers use to harness GPU parallelism. The combination of hardware performance and software ecosystem creates a moat that competitors cannot replicate by matching hardware specifications alone: developers must also adopt a new software stack, retrain engineers, and rewrite code, creating switching costs that extend well beyond the chip itself.

Nvidia's product roadmap reflects the pace of AI demand growth. The Hopper architecture (H100, launched 2023) was the workhorse of the initial AI training buildout. Blackwell (B100/B200, shipping 2025) delivers approximately 2x inference performance over Hopper, and major hyperscalers are deploying nearly 1,000 NVL72 racks per week, with conservative estimates suggesting 2.5 million Blackwell GPUs shipped in 2025. Vera Rubin, the next-generation architecture, follows in Q3 2026 with HBM4 memory support and further performance gains. Each generation command prices of $30,000-40,000 per GPU, and complete AI server systems (containing 8 GPUs with networking and memory) can exceed $300,000.

The financial impact of this demand is extraordinary. Nvidia's data center segment has grown from approximately $15 billion in annual revenue in FY2023 to a run rate exceeding $200 billion in FY2026. Gross margins have remained above 70%, reflecting the pricing power that comes from building the only fully integrated hardware-software platform for AI training at scale. For TMT analysts, Nvidia's financial profile combines semiconductor-like revenue characteristics (hardware sales, product cycles) with software-like margin characteristics (the CUDA ecosystem creates recurring demand and pricing power), making it analytically unique.

Nvidia's product cadence is accelerating: where the company previously released new GPU architectures every 2 years, it has shifted to annual releases, with each generation targeting specific AI workload optimizations. Blackwell targets inference efficiency (critical as AI models move from training to deployment), while Vera Rubin is expected to incorporate HBM4 memory and new interconnect technologies that improve multi-GPU scaling for the largest AI training runs. This accelerated cadence forces customers to refresh hardware more frequently, creating a replacement cycle that sustains demand even as the initial buildout phase matures.

The networking layer is an increasingly important part of Nvidia's AI platform. Nvidia's acquisition of Mellanox (2020, $6.9 billion) gave it control of InfiniBand, the high-speed networking technology that connects GPUs within and across data center racks. As AI clusters grow from hundreds to tens of thousands of GPUs, networking performance becomes the bottleneck, and Nvidia's integrated offering (GPU + networking + software) creates a system-level value proposition that competitors offering standalone chips cannot match. Nvidia's networking revenue has grown into a multi-billion dollar business alongside its GPU revenue.

AMD is the primary challenger to Nvidia in the AI GPU market, though the gap remains substantial. AMD's data center segment revenue reached $4.3 billion in Q3 2025 (up 22% year-over-year), driven by EPYC server processors and Instinct MI series GPUs. The MI300X offers competitive specifications (192GB memory, 2.4x the H100; 5.3 TB/s bandwidth, 1.8x the H100), and the MI350 series entered volume production in mid-2025, including a significant deal with Oracle for up to 130,000 MI355X GPUs.

The competitive landscape is further complicated by the emergence of other AI chip architectures. Intel's Gaudi accelerators target specific AI workloads, Cerebras has built wafer-scale chips optimized for large language model training, and startups like Groq and SambaNova offer specialized inference accelerators. None of these competitors has achieved meaningful market share against Nvidia, but they represent options for customers seeking to diversify their AI hardware supply chain and reduce dependence on a single vendor.

For TMT analysts, the AMD vs. Nvidia competitive dynamic is important for both semiconductor coverage and for understanding the broader AI infrastructure investment cycle. AMD's strategy focuses on offering competitive performance at lower price points, targeting cost-conscious customers and specific inference workloads where the full power of Nvidia's platform is not required. AMD's EPYC server processors (which hold approximately 30%+ server CPU market share, up from near zero a decade ago) demonstrate that AMD can successfully challenge an incumbent's dominance with sustained execution, but the GPU market presents a different challenge because the software ecosystem barrier is higher than in CPUs.

The AI chip demand cycle has created a parallel demand shock in the memory semiconductor market, specifically for High Bandwidth Memory (HBM). AI GPUs require massive amounts of high-speed memory to store and process the parameters of large language models, and HBM provides the bandwidth that standard DRAM cannot match.

SK Hynix leads the HBM market, having been the first to qualify its HBM3E products with Nvidia for Blackwell GPUs. Samsung and Micron are competing aggressively for HBM market share, with Samsung investing heavily to close the yield gap that has kept it behind SK Hynix. HBM revenue has grown from a niche product category to a multi-billion dollar market, and HBM pricing commands significant premiums over standard DRAM (3-5x per gigabyte).

The HBM supply constraint has become a bottleneck for AI GPU production: even when TSMC has capacity to fabricate GPU dies, the final assembled chip cannot ship without the corresponding HBM modules. This supply chain interdependency means that TMT analysts covering AI chip demand must track HBM capacity and allocation alongside GPU production, as constraints in either component limit total system shipments.

The most significant long-term competitive threat to Nvidia is the development of custom AI chips (ASICs) by the hyperscale cloud providers themselves. Custom ASIC shipments are projected to grow 44.6% in 2026, versus 16.1% for GPU shipments, signaling a meaningful and accelerating shift in the hardware landscape.

Google's TPU program is the most mature custom silicon effort, now in its seventh generation (Ironwood, launched November 2025). Google uses TPUs for both internal AI workloads (training Gemini models, powering Google Search AI features) and as a cloud offering (Google Cloud TPU) that competes with Nvidia GPU instances on AWS and Azure. Amazon's Trainium3, launched December 2025 on a 3nm process, demonstrates the accelerating pace of custom chip development: each generation delivers substantial performance improvements while reducing cost per inference.

The rise of custom silicon creates M&A and advisory opportunities for TMT bankers. Companies like Broadcom, which designs custom ASICs on behalf of hyperscalers (including OpenAI's first custom chip), benefit from the custom silicon trend without bearing the end-market risk. Broadcom's custom silicon revenue has grown significantly as hyperscaler demand has intensified, and the company's market capitalization exceeds $1 trillion, partly reflecting the market's recognition of the custom AI silicon opportunity. Chip design services companies, IP licensing firms like Arm Holdings, and specialized packaging companies all benefit from the custom ASIC buildout.

The custom silicon trend also has implications for the semiconductor business cycle. Unlike merchant GPU sales (which can be reduced or paused during demand downturns), custom ASIC programs represent multi-year commitments between the hyperscaler and its chip design partner. Once a custom chip enters production, the hyperscaler has already invested hundreds of millions in design costs and cannot easily switch to an alternative. This commitment dynamic provides more revenue visibility for custom silicon suppliers than for merchant GPU vendors, potentially reducing the cyclicality of the AI chip market over time.

The scale of AI-related data center investment is reshaping the semiconductor industry's demand profile. Microsoft, Amazon, and Alphabet each committed $80-100 billion in 2025 capital expenditure, with the majority directed toward AI infrastructure: GPU servers, networking equipment, power and cooling systems, and the physical data centers that house them. This level of spending, unprecedented in technology history, creates demand for semiconductors across the entire value chain.

The critical constraint for AI data center buildout has shifted from chip availability to power availability. Each Nvidia Blackwell GPU consumes approximately 700-1,000 watts, and a large AI training cluster can require 50-100+ megawatts of power. Data center operators are acquiring power generation assets, signing long-term power purchase agreements, and in some cases building dedicated power infrastructure (including nuclear power partnerships). This power constraint is creating deal flow in adjacent sectors (energy, utilities, industrial) that TMT bankers are increasingly involved in, as the distinction between technology infrastructure and energy infrastructure blurs.

The sustainability of AI chip demand is the central analytical question for TMT analysts covering this sector. Bulls argue that AI adoption is in its earliest stages, that enterprise AI deployment will drive years of additional infrastructure investment, and that 67% of business leaders would maintain AI spending even in a recession. Bears point to the concentration of spending among a small number of hyperscalers (who could reduce capex if AI revenue growth disappoints), the potential for inference efficiency improvements to reduce hardware requirements per unit of AI output, and the risk that the current buildout resembles an infrastructure bubble. TMT analysts must model both scenarios when valuing AI chip companies, because the difference between sustained demand growth and a demand deceleration produces dramatically different valuation outcomes.

The AI chip demand cycle has exposed and intensified bottlenecks across the semiconductor supply chain that create both risks and opportunities for TMT deal flow.

Advanced packaging capacity at TSMC is one of the most acute bottlenecks. Nvidia's Blackwell GPUs require TSMC's Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging technology, which bonds multiple dies (GPU, HBM, networking) into a single package. TSMC has doubled CoWoS capacity from 330,000 wafers in 2024 to 660,000 in 2025, but demand still exceeds supply. This packaging bottleneck is driving investment in OSAT companies and creating M&A opportunities as chipmakers seek to secure packaging capacity.

The availability of leading-edge foundry capacity at TSMC is another constraint. With Nvidia, AMD, Apple, Qualcomm, and Broadcom all competing for TSMC's most advanced nodes (3nm, upcoming 2nm), allocation decisions become strategic. TSMC allocates capacity based on long-term relationships, pricing, and volume commitments, giving its largest customers (Apple, Nvidia) preferential access. Smaller chip designers may struggle to secure capacity for AI-related products, potentially creating consolidation opportunities as they seek partners with existing TSMC relationships.

AI chip demand is the single largest revenue and deal flow driver in semiconductor TMT coverage. The advisory opportunities span GPU and ASIC design companies (M&A for product expansion, strategic advisory for navigating the competitive landscape), foundry and packaging companies (capacity expansion financing, government subsidy advisory under the CHIPS Act), memory companies (HBM-focused investments, capacity allocation decisions between standard DRAM and premium HBM), equipment companies (order pipeline analysis, valuation of companies like ASML whose EUV machines are essential for leading-edge production), and the hyperscale customers themselves (AI infrastructure strategy, build-vs-buy decisions for custom silicon).

The M&A landscape in AI semiconductors is active across multiple transaction types. Nvidia's acquisition of Mellanox established the model of GPU companies acquiring networking capabilities to offer complete AI systems. Broadcom's position as the leading custom ASIC designer has made it a central player in AI chip M&A, with its market capitalization reflecting the market's expectation that custom silicon design will grow significantly. Smaller AI chip startups (Cerebras, Groq, SambaNova, Graphcore) face competitive pressure from both Nvidia's dominance and hyperscaler in-sourcing, creating potential M&A opportunities for companies with valuable and differentiated IP but insufficient scale to compete independently.